[P3-12] Accurate Evaluation of Inversion-Layer Mobility and Experimental Extraction of Local Strain Effect in sub-μm Si MOSFETs

Chika Tanaka, Kazuya Ohuchi, Junji Koga (1.Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 2.Advanced CMOS Technology Department, SoC R&D Center, Semiconductor Company, Toshiba Corporation)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-13] Electron and Hole Mobilities in Orthorhombically Strained Silicon

S. T. Chang (1.Department of Electrical Engineering, National Chung Hsing University)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-14] Investigation and Modeling of Stress Interactions on 90 nm SOI CMOS with Various Mobility Enhancement Approaches

C. T. Lin, Y. K. Fang, W. K. Yeh, H. C. Chang, C. H. Hsu, L. W. Chen, M. L. Lee, C. T. Tsai, W.T. Shiau (1.United Microelectronics Corporation (UMC), Central R&D Division, 2.VLSI Technology Laboratory, Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, 3.Department of Electrical Engineering, National University of Kaohsiung)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-15] MEMS 3-D Stacked RF Transformers Fabricated by 0.18 μm MS/RF CMOS technology With Improved Power Loss and Noise Figure Performances

Yo-Sheng Lin, Hsiao-Bin Liang, Tao Wang, Shey-Shi Lu (1.Department of Electrical Engineering, National Chi-Nan University, 2.Department of Electrical Engineering, National Taiwan University)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-16] Mobility Modulation Technology Impact on Device Performance and Reliability for <100> sub-90nm SOI CMOSFETs

Chieh-Ming Lai, Chien-Ting Lin, Wen-Kuan Yeh, Yean-Kuen Fang, W. T. Shiau (1.Institute of Microelectronics, National Cheng Kung University, 2.Department of Electrical Engineering, National University of Kaohsiung, 3.United Microelectronics Corporation, Central R&D Division)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-17] The DC Performance of Nanometer MOSFETs: Targets Versus Reality

Frank Schwierz (1.Fachgebiet Festkorperelektronik, Technische Universitat Ilmenau)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-18] A High Performance Embedded 60nm Gate Length CMOSFET with Novel Strained Silicon Process

Chih Jen Huang, K.Y. Chang, Sam Chou, Joe Koe, J. H. Huang, Hong Liao, C. Y. Lim (1.United Microelectronics Corp., Central Research & Development, 2.United Microelectronics-Singapore Corp., Advanced Process Integration)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-19] A Novel Simplified Process for Self Aligned Planar Wrapping Gate FET’s with Directionally Crystallized Si Channel Processed via Sequential Lateral Solidification

Young Woo Park, Jason C. S. Woo (1.Department of Electrical Engineering, University of California)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-20] The Characteristics and Reliability of Multi-channel Poly-Si TFTs

Ming-Shan Shieh, Jen-Yi Sang, Chih-Yang Chen, Shen-De Wang, Tan-Fu Lei (1.Institute of Electronics, National Chiao-Tung University)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-21L] Empirical Quantitative Modeling of Threshold Voltage of Sub-50-nm Double-Gate SOI MOSFET’s

Yuki Tahara, Yasuhisa Omura (1.Dept. of Electronics, Kansai University)

2005 International Conference on Solid State Devices and Materials |PDF Download