[P2-7] Characterization of Self Assembled Monolayers for Ultra Low-k Films

B. Ramana Murthy, Wan Mun Yee, Ahila Krishnamoorthy, V. Anand, K.Y. Yong, S. F. Choy, K. Prasad, R. Kumar, Don C Frye (1.Semiconductor Process Technologies, Institute of Microelectronics, 2.Nanyang Technological University, School of Electrical & Electronic Eng., 3.National University of Singapore, School of Electrical & Computer Eng., 4.The Dow Chemical Company)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-8] Deep Trench Etching for Chip-to-Chip Three-Dimensional Integration

Hirokazu Kikuchi, Yusuke Yamada, Hitoshi Kijima, Takafumi Fukushima, Mitsumasa Koyanagi (1.Dept. of Bioengineering and Robotics, Tohoku Univ.)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-9] High Aspect-Ratio Through-Wafer Interconnections with Thick Oxidized Porous Silicon Sidewall Via

Bun-Joong Kim, Man-Lyun Ha, Young-Se Kwon (1.Korea Advanced Institute of Science and Technology, Department of Electrical Engineering and Computer Science)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-10] Numerical Study of the Self-Interconnection Assembly Method Using Resin Containing Solder Fillers

Koushi Ohta, Kiyokazu Yasuda, Michiya Matsushima, Kozo Fujimoto (1.Osaka Univ., Dept. of Materials and Manufacturing Science, Graduate School of Eng.)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-11] The annealing effects of GaN MIS capacitors with photo-CVD oxide layers

Yu-Zung Chiou, Yan-Kuin Su, Shoou-Jinn Chang, Chun-Kai Wang, Jing-Jou Tang (1.Department of Electronics Engineering, Southern Taiwan University of Technology, 2.Department of Electrical Engineering, National Cheng-Kung University)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-12] AC Power Loss and Signal Coupling in VLSI backend Interconnects

C. C. Chen, C. C. Liao, H. L. Kao, Albert Chin, Sean P. McAlister, C. C. Chi (1.Dept. of Electronics Eng., Nat’l Chiao Tung Univ., Nano Sci. Tech. Center, Univ. System of Taiwan, 2.National Research Council of Canada, 3.Dept. of Physics, National Tsing Hua Univ.)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-13] Nickel Germanide Formation on Condensed Ge Layer for Ge-on-Insulator Device Application

Hoon Choi, Mungi Park, Takafumi Fukushima, Mitsumasa Koyanagi (1.Department of Bioengineering and Robotics, Tohoku University, 2.Mobile Display R&D Team, LCD Business, Samsung Electronics Co. Ltd.)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-14L] Properties of Low-k (k-2.05) Plasma Polymer Films Deposited by PECVD Using Decamethyl-cyclopentasiloxane and Cyclohexane as the Precursors

Jaeyoung Yang, Sungwoo Lee, Sanghak Yeo, Donggeun Jung, Heeyeop Chae (1.Department of Physics, Brain Korea 21 Physics Research Division and Institute of Basic Science, Sungkyunkwan University, 2.Department of Chemical Engineering, Sungkyunkwan University)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P2-15L] Photoluminescence characterization of strained Si-SiGe-on-insulator wafers

Dong Wang, Koji Matsumoto, Masahiko Nakamae, Hiroshi Nakashima (1.Art, Science and Technology Center for Cooperative Research, Kyushu University, 2.SUMCO Corporation)

2005 International Conference on Solid State Devices and Materials |PDF Download

[P3-1] 3D Device Simulation for Neutron-induced Latch-up in CMOS Devices

H. Yamaguchi, E. Ibe, Y. Yahagi, H. Kameyama (1.Production Engineering Research Laboratory, Hitachi Ltd., 2.Renesas Kodaira Semiconductor Co. Ltd)

2005 International Conference on Solid State Devices and Materials |PDF Download