[E-1-2] Characterization of junctionless Z-RAM cell

C. W. Lee¹, S. Okhonin², M. Nagoga², A. Kranti¹, I. Ferain¹, N. Dehdashti Akhavan¹, P. Razavi¹, R. Yu¹, R. Yan¹, J. P. Colinge¹ (1.Tyndall National Inst. , Ireland, 2.Innovative Silicon , Switzerl)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-1-3] A Study of a Data Retention Characteristic for Various Schemes of Gate Oxide Formation in Sub-50-nm Saddle-Fin Transistor DRAM Technology

S. W. Ryu¹, S. K. Chun¹, T. Jang¹, B. Lee¹, D. Lee¹, M. Yoo¹, S. Cha¹, J. G. Jeong¹, S. J. Hong¹ (1.Hynix Semiconductor Inc. , Korea)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-1-4] An analysis of Conduction Mechanism and Reliability Characteristics of MIM Capacitor with Single ZrO₂ Layer

H. M. Kwon¹, I. S. Han¹, S. U. Park¹, J. D. Bok¹, Y. J. Jung¹, H. S. Shin¹, C. Y. Kang², B. H. Lee³, R. Jammy², H. D. Lee¹ (1.Chungnam National Univ., 2.SEMATECH, 3.GIST , Korea)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-2-1] Improvement of Data Retention in NAND Flash Memory for beyond 3x nm using HTO Liner and IPD Thickness Optimization

J. S. Leem¹, J. Seo¹, B. K. Kim¹, K. S. Kim¹, H. H. Chang¹, K. O. Ahn¹, S. K. Lee¹, S. J. Hong¹ (1.Hynix Semiconductor Inc. , Korea)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-2-3] The Evaluation Method and Characteristics of IPD layer in TLC (Triple Level Cell) NAND Flash

B. D. Jo¹, Y. Jeong¹, J. Y. Park¹, P. H. Kim¹, S. J. Park¹, M. K. Cho¹, K. O. Ahn¹, Y. Koh¹ (1.Hynix Semiconductor Inc. , Korea)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-2-4] A Low Power and Improving Read Disturb Characteristics by Using Multi-CSL Architecture in MLC NAND Flash Memory

M. Kang^1,2, K. T. Park², Y. Song², S. Lee², Y. Lim², K. D. Suh³, H. Shin¹ (1.Seoul National Univ., 2.Samsung Electronics Co., Ltd., 3.Sungkyunkwan Univ. , Korea)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-3-1] Current Development Status and Future Challenges of Charge-Trapping NAND Flash

H. T. Lue¹, K. Y. Hsieh¹, C. Y. Lu¹ (1.Macronix International Co., Ltd. , Taiwan)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-3-2] Collective Tunneling Model in Charge Trap Type NVM Cell

M. Muraguchi¹, Y. Sakurai², Y. Takada², Y. Shigeta⁴, M. Ikeda³, K. Makihara³, S. Miyazaki³, S. Nomura², K. Shiraishi², T. Endoh¹ (1.Tohoku Univ., 2.Univ. of Tsukuba, 3.Hiroshima Univ., 4.Univ. of Hyogo , Japan)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-3-3] Bandgap Engineered Nanowire (BEN) SONOS NAND Flash Memory

J. G. Yun¹, D. W. Kwon², J. H. Lee¹, H. Shin¹, B. G. Park¹ (1.Seoul National Univ., 2.Samsung Electronics Co., Ltd. , Korea)

2010 International Conference on Solid State Devices and Materials |PDF Download

[E-3-4] Atomistic Design of Guiding Principles for High Quality MONOS Memories-First Principles Study of H and O Incorporation Effects for N Vacancies in SiN Charge Trap Layers-

K. Yamaguchi¹, A. Otake¹, K. Shiraishi¹ (1.Univ. of Tsukuba , Japan)

2010 International Conference on Solid State Devices and Materials |PDF Download

655 results (161 - 170)

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