[A-1-1] Dual workfunction metal-gate FinFET devices fabricated using total gate silicidation

Jakub Kedzierski, Edward Nowak, Meikei Ieong, Thomas Kanarsky, Diane Boyd (1.IBM Semiconductor Research and Development Center (SRDC) Research Division, 2.Microelectronics Division)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-1-2] Influences of Gate-Poly Impurity Concentration on Inversion-Layer Mobility in MOSFETs with Ultrathin Gate Oxide Film

Junji Koga, Takamitsu Ishihara, Shin-ichi Takagi (1.Advanced LSI Technology Laboratory, Toshiba Corporation)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-1-3] New Self-aligned Metal-gate MOSFETs Using Aluminum Substitution Technology

S. Nakamura, H. Shido, T. Kurahashi, S. Kishii, T. Nagata, B. Kumasaka, T. Usuki, S. Sato, Y. Mishima (1.Fujitsu Laboratories Ltd.)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-1-4] Screening Effect on Remote Coulomb Scattering due to impurities in Polysilicon Gate of MOSFET

Takamitsu Ishihara, Junji Koga, Shinichi Takagi, Kazuya Matsuzawa (1.Advanced LSI Thechnology Laboratory, Research and Development Center,Toshiba corporation)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-1-5] Direct evaluation of an interfacial layer in high-k gate dielectrics by 1/f noise measurements

Tsuyoshi Ishikawa, Shinpei Tsujikawa, Shin-ichi Saito, Digh Hisamoto, Shin’ichiro Kimura (1.Central Research Laboratory, Hitachi, Ltd.)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-2-1] Enhancement of VTH Degradation under NBT Stress due to Hole Capturing

Yuichiro Mitani, Makoto Nagamine, Hideki Satake, A. Toriumi (1.Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation, 2.Department of Materials Science, The University of Tokyo)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-2-2] New Mechanism for Negative-Bias-Temperature Instability and Its Impact on Scaling of pMOSFETs

Da-Yuan Lee, Horng-Chih Lin, Chi-Chun Chen, Chao-Hsin Chien, Tiao-Yuan Huang, Tahui Wang, Tze-Liang Lee, Shih-Chang Chen, Mong-Song Liang (1.Institute of Electronics, National Chiao-Tung University, 2.National Nano Device Laboratories, 3.Taiwan Semiconductor Manufacturing Company)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-2-3] Origin of Enhanced Thermal Noise for 100nm-MOSFETs

S. Hosokawa, Y. Shiraga, H. Ueno, M. Miura-Mattausch, H.J. Mattausch, T. Ohguro, S. Kumashiro, M. Taguchi, H. Masuda, S. Miyamoto (1.Graduate School of Advanced Sciences of Matter, 2.Research Center for Nanodevices and Systems, Hiroshima University, 3.Semiconductor Technology Academic Research Center)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-2-4] Comparison of the Interconnect Capacitances of Various SRAM Cell Layouts To Achieve High Speed, Low Power SRAM Cells

Y. Tsukamoto, K. Nii, Y. Yamagami, T. Yoshizawa, S. Imaoka, T. Suzuki, A. Shibayama, H. Makino (1.LSI Product Technology Unit , Renesas Technology Corp., 2.Corporate Development Div., Semiconductor Company, Matsushita Electric Industrial Corp., 3.Electronic Devices Design Center, Renesas Device Design Corp.)

2003 International Conference on Solid State Devices and Materials |PDF Download

[A-2-5] Eliminating Threshold Voltage Offset of PMOSFETs in High-Density DRAM

Norikatsu Takaura, Riichiro Takemura, Hideyuki Matsuoka, Ryo Nagai, Satoru Yamada, Hisao Asakura, Shin’ichiro Kimura (1.Central Research Laboratory, Hitachi, Ltd., 2.Advanced Device Development Gr., Elpida Memory, Inc., 3.Information & Control System Division, Computer Systems Quality Assurance Sect, Hitachi, Ltd.)

2003 International Conference on Solid State Devices and Materials |PDF Download