[B-1-6] Molecular Dynamics Study of Oxidation Process with SiO emission and incorporation into the Si/SiO₂ System

N. Takahashi¹, T. Yamasaki¹, C. Kaneta¹ (1.Fujitsu Labs. Ltd.)

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-2-1] Thermally stable Ni-silicide gate electrode with TiN barrier metal for NAND flash memory application with 24 nm technology and beyond

S. J. Whang¹, M. S. Joo¹, B. M. Seo¹, K. E. Chang¹, W. K. Kim¹, T. W. Jung¹, G. H. Kim¹, J. Y. Lim¹, K. Y. Kim¹, K. Hong¹, S. K. Park¹ (1.Hynix Semiconductor Inc.)

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-2-2] Lanthanoid Metal Oxide MIM Capacitors for Precision Analog Circuits: Material Screening, Process Development, and Characterization

J. D. Chen¹, J. J. Yang¹, R. Wise², P. Steinmann², C. Zhu¹, Y. C. Yeo¹ (1.National Univ. of Singapore(Singapore), 2.Texas Instruments Inc.(USA))

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-2-3] Oxygen-Terminated Si Surface for Atomic Layer Deposition and its Impact on Interfacial Electrical Quality of sub-nm-EOT high-k Gate Stacks

Y. Morita¹, S. Migita¹, N. Taoka¹, W. Mizubayashi¹, H. Ota¹ (1.MIRAI-AIST)

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-2-4] New Criteria for Suppressing Extrinsic Defect Generation in Ultra Thin SiON Gate Insulator (EOT<1.4nm) for Advanced CMOSFETs

S. Shimamoto¹, H. Kawashima², T. Kikuchi¹, Y. Yamaguchi², A. Hiraiwa² (1.Hitachi, Ltd.(Japan), 2.Renesas Tech. Corp.(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-2-5L] Polarized Raman study of mechanical stress distribution in W/TiN metal gate MOSFETs

T. Tada¹, V. Poborchii¹, T. Matsuki², J. Yugami², T. Kanayama¹ (1.MIRAI-AIST(Japan), 2.Selete(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-2-6L] In Situ Si Wafer Surface Temperature Measurement during Flash Lamp Annealing

Y. Yamada¹, T. Aoyama², H. Chino³, K. Hiraka³, J. Ishii¹, S. Kadoya³, S. Kato², H. Kiyama⁴, H. Kondo⁴, T. Kuroiwa⁴, K. Matsuo⁴, T. Owada⁵, T. Shimizu³, T. Yokomori⁵ (1.AIST(Japan), 2.Semiconductor Leading Edge Tech. Inc.(Japan), 3.Chino Corp.(Japan), 4.Dainippon Screen Manufac. Co. Ltd.(Japan), 5.Ushio Inc.(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-4-1] Development of high-k / metal gate CMOS technology in Selete

K. Ikeda¹, J. Yugami¹, T. Aoyama¹, Y. Ohji¹ (1.Selete)

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-4-2] Gate Leakage Advantage of LaO Incorporation for V_t Tuning in High-k nMOSFETs over Metal Gate WF Control

M. Kadoshima¹, S. Sakashita¹, T. Kawahara¹, M. Inoue¹, M. Mizutani¹, Y. Nishida¹, A. Shimizu¹, Y. Takeshima¹, S. Yamanari¹, M. Anma¹, R. Mitsuhashi², Y. Satoh², S. Matsuyama², A. Tsudumitani², Y. Okuno², H. Umeda¹, J. Yugami¹, H. Yoshimura¹, H. Miyatake¹ (1.Renesas Tech. Corp.(Japan), 2.Panasonic Corp.(Japan))

2009 International Conference on Solid State Devices and Materials |PDF Download

[B-4-3] Influence of Post Cap-layer Deposition Annealing Temperature on MgO Diffusion in High-k/IFL Stacks

T. Morooka¹, T. Matsuki¹, T. Nabatame¹, J. Yugami¹, K. Ikeda¹, Y. Ohji¹ (1.Selete)

2009 International Conference on Solid State Devices and Materials |PDF Download